The present invention relates to a semiconductor device, and more particularly relates to a CMOS (Complementary Metal Oxide Semiconductor) device.
Generally, CMOS elements for fabricating a desired digital circuit and CMOS elements for fabricating a desired analogue circuit are formed in respective different silicon chips, which are electrically and physically independent from each other. However, in recent years, CMOS elements for fabricating both desired digital and analogue circuits, have been formed in the same single silicon chip, in order to increase a package density. For example, a coding and decoding apparatus, that is a so-called CODEC (coder and decoder), is usually fabricated by both digital and analogue CMOS devices which are formed in a single silicon chip. In such a digital and analogue CMOS device, it is a well known defect that undesired electric noise signals are induced in the analogue CMOS elements. The electric noise signals are created due to the occurrence of a sharp rising edge or a sharp falling edge of each rectangular pulse signal generated in the digital CMOS elements. In the prior art, the digital CMOS elements and the analogue CMOS elements are not arranged, on the same silicon chip, at random, but are arranged in different respective digital and an analogue areas thereon, so as to decrease the induction coupling of the electric noise signals into the analogue CMOS elements. However, it is very difficult to almost completely suppress the inductive coupling of the electric noise signals.